1. Field of the Invention
The present invention is in generally in the field of semiconductors. More particularly, the invention is in the field of fabrication of transistor circuits.
2. Background Art
High operating frequencies and currents seriously limit the performance of power devices and transistors. One problem lies when bond wires are used to connect a single-ended power transistor to a ground node. At high operating frequencies and currents, the inductance of a bond wire creates a noticeable voltage drop between the power transistor, for example an emitter terminal of the power transistor, and the ground node. The voltage drop can pull the power transistor out of its operating region, also called de-biasing the transistor. In addition, the voltage drop between the emitter terminal and ground node reduces the voltage swing over the transistor requiring a much higher supply voltage, leading to lower efficiency and shorter battery life for wireless applications. Another problem resides in distributing large currents through one or more power transistors. Due to the thermal properties of each power transistor, the current can be thermally hogged by one transistor or can increase in the center of large arrays of transistors with respect to the outer areas of the array, heating up the internal junctions within that device. This phenomenon, known as thermal runaway, can destroy a power semiconductor transistor or device or significantly hurt the performance of a power transistor circuit.
A further problem is posed by the very low input and output impedances of an amplifier using Si or SiGe BJT's. These amplifiers have a very high current gain leading to difficult matching conditions and particularly a non-linear gain observed in gain expansion over input power. By applying a small resistance at the output or emitter of the transistor, the gain can be reduced, leading to a device that can be easier matched for optimum power amplification and efficiency. This small resistance also improves the linearity of the gain of the device, leading to higher efficiency and more power output per transistor.
Another problem for amplifier circuits and particularly wireless power amplifiers is the mismatch at the output which leads to power being reflected back into the transistor that could destroy the transistor. A resistance at the output of the transistor will reduce the amount of the power or voltage over the transistor output preventing it from being damaged.
In one approach, a through-wafer via has been used to directly connect a power transistor to a conductive ground plane on the backside of a substrate. Although through-wafer vias have an inductance that is significantly less than the inductance of bond wires, one problem with through-wafer vias is that they still have a relatively high inductance and are very large and deep, resulting in some of the problems discussed above. Moreover, although through-wafer vias may have very small resistances and function relatively well at high operating currents, these structures are too large and can not be used to provide a resistance at the ground node of the transistor to function for example as ballast resistors or as resistors to improve matching, linearize the gain or protect the transistor from power reflection. Moreover, ballast resistors that are conventionally used to prevent thermal runaway disadvantageously take up a lot of semiconductor area. In addition, through wafer via requires extensive processing from the wafer backside after the wafer is fully processed on the frontside, which is very costly and leads to manufacturing problems for larger wafer diameters such as 200 mm and beyond.
Thus, there is a need in the art for an effective conductive structure that provides a reduced inductance at some small parasitic resistance, that is capable of direct connection to a substrate or ground path, provides some control over distribution of resistance at the transistor output, and that consumes a small semiconductor area, and reduces the extent of wafer backside processing.